A memory cell array having three-dimensional structure is proposed. The memory cell array includes a stacked body including a plurality of electrode layers stacked via insulating layers. The electrode layer functions as a control gate in a memory cell. A memory hole is formed in the stacked body. A silicon body as a channel is provided on a side wall of the memory hole via a charge storage film.
In the memory cell array having the three-dimensional structure, when the number of stacked electrode layers increases and the aspect ratio of the memory hole is higher with increase of storage capacity, it tends to be difficult to form the hole with higher roundness in the stacking direction in uniform diameter.